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Table of Contents
Power Quality Analyzer
Requirements
- 3-phase voltage, current, frequency, measurement
- active, reactive, apparent power, power factor
- neutral current
- harmonics analysis up to 50th order
- quality - swell, dip, interruption, transient/over voltage, inrush current, unbalance rate
- real-time operation
- USB communication interface
esp-idf for ESP32-S3 installation and configuration
- installation of esp-idf development environment
$ mkdir ~/esp $ cd ~/esp $ git clone -b v5.5.1 --recursive https://github.com/espressif/esp-idf.git $ cd esp-idf $ ./install.sh esp32s3
- pqa project configuration
$ cd ~/projects.local/elektro/pq-anal/fw/pqa $ . ~/esp/esp-idf/export.sh $ vim main/idf_component.yml $ cat main/idf_component.yml ## IDF Component Manager Manifest File dependencies: ... espressif/esp-dsp: '*' $ idf.menuconfig * Serial flasher config ---> Flash size (8MB) * Component config ---> ESP PSRAM ---> [*] Support for external, SPI-connected RAM * ---> SPI RAM Config ---> Mode (QUAD/OCT) of SPI RAM chip in use (Octal Mode PSRAM) * ---> SPI RAM Config ---> SPI RAM access method (Make RAM allocatable using malloc() as well) * ---> SPI RAM Config ---> (1024) Maximum malloc size, in bytes, to always put in internal memory * ---> SPI RAM Config ---> Allow .bss segment placed in external memory * Component config ---> ESP System Settings ---> CPU frequency (160MHz) * Component config ---> LWIP ---> SNTP ---> (2) Maximum number of NTP servers * Component config ---> DSP Library ---> DSP Optimization (ANSI C) * Component config ---> DSP Library ---> Maximum FFT length (4096)
- build, flash and monitor
$ idf.py fullclean $ idf.py build ; echo $? $ idf.py -p /dev/tty.usbmodem11101 flash $ idf.py -p /dev/tty.usbmodem11101 monitor
AC sensors
<tikzjax> \usetikzlibrary{circuitikz} \begin{circuitikz}
\draw (0,0) to[R, l=$R_1$] (2,0)
to[C, l=$C_1$] (2,2)
to[V, l=$V_s$] (0,2) -- (0,0);
\end{circuitikz} </tikzjax>
AC voltage sensors
For three-phase balanced system, the sum of instantaneous values of phase voltages (as well as currents) is zero: $$v_{L1} + v_{L2} + v_{L3} = i_{L1} + i_{L2} + i_{L3} = 0$$ In such case also $$u_{N1} = u_{N2} = 0$$ and $$v_1 = v_{L1}\frac{R_{12}}{R_{11} + R_{12}}$$
SPICE simulation
Voltage divider for measuring phase voltages - SPICE simulation schema
Normal grid conditions
Phase VL3 disconnected
VL2 & VL3 phases disconnected (only VL1 connected)
Power supply
| Component | Max. consumption [mA] | # | Total consumption [mA] |
|---|---|---|---|
| ACS712 | 13 | 4 | 52 |
| TL064 (TL084) | 1 (12) | 2 | 2 (24) |
| 78xx/79xx | 6 | 3 | 18 |
| Total | 72 (94) |





